;****************************** CTC ****************************** ; Program functions: ; - initialize the CTC ; - implement an interrupt mechanism ; - write an interrupt service routine that handles the TASK. ;**************************************************************** .ORG 0000h ; defineD the hardware addresses of the control port of your four ctc channels. CH0: .equ 0h ; Zero Count / TimeOut 0 output, Clock / Trigger 0 input. CH1: .equ 1h ; ZC/TO1, C/TRG1. CH2: .equ 2h ; ZC/TO2, C/TRG2. CH3: .equ 3h ; Clock/Trigger 3 input only (no output). InitCTC: ; Configure the CTC. ; Init CH 0 and CH1. LD A, 00000011b ; int off, timer on, prescaler=16, don't care ext. TRG edge, ; start timer on loading constant, no time constant follows ; sw­rst active, this is a ctrl cmd OUT (CH0), A ; CH0 is on hold now OUT (CH1), A ; CH1 is on hold now ; Init CH2. ;CH2 divides CPU CLK by (256*256) providing a clock signal at TO2. TO2 is connected to TRG3. LD A,00100111b ; int off, timer on, prescaler=256, no ext. start, ; start upon loading time constant, time constant follows ; sw reset, this is a ctrl cmd OUT (CH2), A LD A, 0FFh ; time constant 255d defined and loaded into channel 2. OUT (CH2), A ; T02 outputs f= CPU_CLK/(256*256) ; Init CH3. ; Input TRG of CH3 is supplied by clock signal from TO2. ; CH3 divides TO2 clock by AFh. ; CH3 interupts CPU appr. every 2sec to service int routine CT3_ZERO (flashes LED) LD A, 11000111b ; int on, counter on, prescaler don't care, edge don't care, ; time trigger don't care, time constant follows ; sw reset, this is a ctrl cmd OUT (CH3), A LD A, 0AFh ; time constant AFh defined and loaded into channel 3 OUT (CH3), A LD A, 10h ; it vector defined in bit 7­3,bit 2­1 don't care, bit 0 = 0 OUT (CH0), A ; and loaded into channel 0 INT_INI: ; Set up the CPU interrupt mode 2. LD A, 0 LD I, A ; load I reg with zero IM 2 ; set int mode 2 EI ; enable interupt ; CT3 zero count routine. CT3_ZERO: ;flashes LED PUSH AF ; backup registers A and F ; now address your periphery that turns the LED on/off e.g. a D­Flip­Flop POP AF ; restore registers A and F EI ;re­enable interrups RETI .ORG 0016h ; CTC interrupt vector table. .DW CT3_ZERO ; Every time CTC channel 3 (CH3) count equals zero, an interrupt is triggered ; causing the CPU to jump to the memory address specified by the term CT3_ZERO. .END