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Z80: TESTS I - Used to test Z80
CPU and buses: Address, Data, Control. - The data bus is
pulled low which effectively causes every data byte read to be
"0x00" which is recognized by the CPU as a No Op; it does nothing
but increment the Program Counter (PC) which can be seen via the
Address Bus LEDs - The PC starts at
0 so the first address read by the CPU is 0. The data contained in
location 0 is 00. The NOP is executed and the PC is incremented. The
net effect is to see the address bus increment up to 65535, if you
have LEDs attached to it through current-limiting drivers
ROM Test - Determines if the
EEPROM, busses, and address decoding logic are working properly - A 32KB (256K x
1-bit, 32K x 8-bit) EEPROM is pre-programmed with nothing but 0x00
NOPs - 74hct32 and 74hct14 are
"glue" logic for decoding the EEPROM as the lower 32KB of the 64KB
address space is tested - Directions are
provided to build an Arduino 5v Nano-based EEPROM programmer - EEPROM contents
are changed from NOPs to a program that will copy a data pattern to
every location in the 32KB SRAM - The glue logic as
well as the upper 32KB of the 64KB address
space are tested - See the ROM Test
above for a link to building the Arduino 5v Nano-based EEPROM
programmer
- We'll configure the
8255 PPI (general purpose programmable
parallel I/O device) to output to an LED bar graph display
- We'll configure the 8255 PPI to accept input from a 4x4 keypad and output
each key press position to an LED bar graph
- The 8255 will be configured to
output a command string to configure a 2x16 8-bit parallel LCD panel, and then
output a data string to the LCD
- The 8255 will be configured for simultaneous input
and output: user input from a 4x4 keypad
is output to a 2x16 LCD panel - Now that we have our CPU, ROM and RAM
working, we can test our new CPU Single-Stepping circuit to watch our
assembled code
progress instruction by instruction on 7-segment LEDs.
TEST
Details
CPU Test
RAM Test
I/O Tests
CPU Single-Stepping
Test
ROM Monitor Test
ROM BIOS Test